Testimonials

Guidance Marine

"From the outset, Covnetics presented themselves as knowledgeable and experienced electronics design subcontractors. We engaged with them on a short notice fast turnaround project and they were able to quickly respond to our needs and provide regular feedback, which made a real difference to the overall quality of the electronics design.
Thank you."

Milijan Mudrinic, Product Manager - Guidance Marine

Apical

"Covnetics have provided FPGA design services which included RTL development, simulation and hardware emulation using Altera technology and utilising an embedded NIOS processor. The activities centred around providing a demonstration capability for transferring images (RAW and RGB) from an on-board DDR memory to an SD memory card. The benefits in using Covnetics is that they were able to respond to our queries immediately, support our group throughout the activity and applied the collective experience of their group to this development. Covnetics have shown themselves to be a highly skilled design service group, who ensure that the customers' needs come first and certainly a group we would use again on future projects."

Judd Heape, Vice President of Engineering - Apical Limited

"Covnetics have provided us the implementation of a new feature in an existing product based on a set of FPGAs, as requested to answer an urgent customer demand. They have performed the optimised design partitioning with the agreed goal of minimising effort and risks, the actual implementation of the feature on the physical device and the test at device and board level.
We have been highly impressed with their competence at technology and system levels, the thoroughness in analysis, the implementation and verification discipline, and the strict adherence to a tight time schedule. Moreover, they have been very effective in assisting us in the final verification at system level.
In our experience Covnetics have shown outstanding skills in FPGA/ASIC design disciplines and overall system competence, and a capability to deeply understand customers needs. We position them as a valuable and trustworthy partner for demanding design needs."

Engineering Manager - Tier 1 Telecom Products and Telecom Services Supplier

Customer Case Study

  • Design Contract : Undertake full design and verification responsibility for new Ethernet traffic processing implementation for use in Xilinx Kintex 7 technology, and for RTL implementation into customer ASIC
  • The customer’s design process and rules were followed for this development
  • Period : 18 months
  • Customer : Tier 1 Telecommunications Supplier
  • Technology : Xilinx Kintex 7 and vendor ASIC
  • Technology Resource : approx. 53k registers, approx. 200 RAMs (~2Mbits), core speeds 125MHz and 200MHz
  • Business Model : Time and materials (hourly charge) plus fixed fee

  • Design Description : FPGA/ASIC to be used in a product which would transport packets from an ethernet LAN interface over a microwave WAN radio interface (mobile backhaul solution). Conversely to take the packets from the WAN interface and transport them over the LAN ethernet interface. The design included the following functions:
    • MAC interfaces at 100M, 1GE and 2.5GE, full duplex. Includes full set of standard based performance counters
    • MAC address learning for both the LAN and WAN ports, access control lists for the LAN port
    • Flexible classification incorporating a custom hardware processor. Software (microcode) for classification algorithms written by Covnetics and executed within processor
    • Policing algorithms at frame or bit rate
    • Packet header modifications to support VLAN tagging and de-tagging
    • Link and Service OAM support, also encompassing customer hardware processors for software updates (Covnetics microcode)
    • Management port MAC (10M/100M) for insertion and extraction of control packets (DCN packets)
    • IEEE1588v2 transparent and boundary clock support (Precision Timing Protocol - PTP), addition of timestamps
    • Traffic scheduling and priority queuing, DDR3 interface
    • MDIO and I2C interfaces to external PHY device and SFP
    • In-built diagnostic packet generators, analysers and packet capture

"Covnetics have provided FPGA design services during which they have developed several FPGAs and supplied IP for an ASIC. The developments centred around a packet based traffic management engine with additional SOAM and IEEE1588 functions. They were responsible for assisting with the requirements definition, the design and verification of many modules including hardware emulation and the support for our systems, hardware and software groups. Covnetics adopted a rigorous verification methodology (simulation, review, emulation). They were able to assist with the hardware bring-up and were always keen to assist our groups with any problems which were encountered.
The deliverables from Covnetics were of the highest quality and provided high confidence that the design would meets its targets. Another key benefit in using Covnetics is that they were able to respond to our queries and issues immediately and supported our groups throughout the design development.
Covnetics have shown themselves to be a flexible and highly skilled design service group and certainly a group we would use again on future projects."

Manager - Tier 1 Telecommunications Supplier